1. Field of the Invention
The present invention relates to wordline drivers used in memory arrays which are capable of driving both positive and negative voltages on the wordlines; and more particularly to floating gate memory devices which apply a negative voltage to wordlines during an erase mode, and a positive voltage to individual wordlines during a read mode and a program mode.
2. Description of Related Art
In nonvolatile semiconductor memory devices based on floating gate memory cells, such as those known as flash EEPROM, positive and negative voltages are used to read and write data into the nonvolatile memory array. The writing of data into the nonvolatile memory array for floating gate devices involves processes known as the program and erase modes. The erase mode involves setting an entire array, or at least a sector of an array, to a single state, in which either all of the cells in the array (or sector) have a low threshold or all of the cells in the array (or sector) have a high threshold. Whether the erased state is a high threshold state, in which the floating gate of the cell is charged or a low threshold state in which the floating gate is discharged, depends on the particular implementation of the flash memory. The programming mode involves charging or discharging the floating gate of individually addressed cells in the array to establish the opposite threshold level with respect to the erased state.
It is well known that in order to discharge the floating gate, it is advantageous to apply a negative voltage to the wordline for the cell to be discharged. This assists in driving electrons out of the floating gate into the source, drain or channel regions of the cell, which are typically biased to a positive level to attract the electrons. However, circuitry for applying a negative voltage to a wordline presents some difficulties.
Wordline drivers must be capable of driving a positive voltage during a normal read mode for the device to selected wordlines in response to decoded addresses. It has proved difficult in the prior art to provide a wordline driver with the simple circuitry that can also apply a negative voltage to selected the wordlines. Prior systems for applying negative voltages to the wordlines have overridden the decoding function which drives the wordline driver, making it impossible to selectively apply negative voltages to individual wordlines. See, for instance, European Patent Application No. 92112727.0 entitled NONVOLATILE SEMI-CONDUCTOR MEMORY DEVICE HAVING ROW DECODER, invented by Atsumi, et al. (Publication No. 0 525 678 A2); and European Patent Application No. 92830115.9, entitled DECODER CIRCUIT CAPABLE OF TRANSFERRING POSITIVE AND NEGATIVE VOLTAGES, invented by Gastaldi (Publication No. 0 559 995 A1). In both of these European patent applications, a wordline driver is disclosed which provides a positive voltage to selected wordlines for normal read mode operations, but overrides the selecting function of the decoder during an erasing mode to apply a negative voltage to all wordlines. Because the decoding function is overridden, negative wordline voltages are applied to circuitry for all cells, even during a sector erase. This results in disturbance of cells that are not being erased.
In alternative systems, separate drivers, one for positive voltage and one for negative voltage, at opposite ends of the wordline and each coupled to the decoding circuit have been used. For instance, Arakawa, U.S. Pat. No. 5,136,541, entitled PROGRAMMABLE READ ONLY MEMORY USING STACKED-GATE CELL ERASABLE BY HOLE INJECTION, and Arakawa, U.S. Pat. No. 5,253,200 entitled ELECTRICALLY ERASABLE AND PROGRAMMABLE READ ONLY MEMORY USING STACKED-GATE CELL, describe a system for driving a wordline with a positive and negative voltage based on the use of separate drivers. (See, for instance, FIG. 3 of Arakawa's U.S. Pat. No. 5,136,541).
U.S. Pat. No. 5,331,480 entitled METHOD AND APPARATUS FOR EPROM NEGATIVE VOLTAGE WORDLINE DECODING, invented by Schreck, describes a system in which each wordline has an independent negative voltage charge pump in order to provide for decoding in a negative voltage and positive voltage state. However, when a single negative voltage source is coupled to a plurality of wordline drivers, all wordlines are driven negative at the same time. Thus, the Schreck circuit is impractical in large memory systems because of the expense and complexity in repeating large numbers of charge pumps on a single chip.
Venkatesh, et. al., "A55 ns 6.35 .mu.m 5V-only 16M Flash Memory with Deep-Power-Down," 1996, IEEE International Solid-State Circuits Conference, Paper JP 2.7, pp. 44-45; discloses a wordline driver for positive and negative voltages (FIG. 1(a)), and mentions sector erase. However, there is no discussion of decoding of the wordlines during erase. See also U.S. Pat. No. 5,521,867 (FIG. 4), entitled ADJUSTABLE THRESHOLD VOLTAGE CONVERSION CIRCUIT, invented by Chen, et. al.
It is desirable to provide a simplified wordline driver capable of selectively applying positive or negative voltages to a wordline during a program mode in a floating gate device, or otherwise to the wordline in a memory array. It is further desirable that the driver be small in layout, and support sector level erase operations in which the wordlines of memory cells in the block to be erased are driven with negative voltages.